Toward behavioural level IPs : high level synthesis of the Viterbi algorithm
نویسندگان
چکیده
This paper presents the behavioural synthesis of a complex application widely used in digital communications : the Viterbi algorithm. Since architectural synthesis allows different design alternatives to be rapidly explored under various constraints, dedicated architectures can be generated. In the same way, when the behavioural specification is generic, the synthesis can be rapidly turned to a specific application or reused as a virtual component in a high level system description.
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